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Altera_Forum's avatar
Altera_Forum
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12 years ago

configure fpga without jtag pins

Hi to all,

i would like to implement this kind of schematic:

https://www.alteraforum.com/forum/attachment.php?attachmentid=8524

  1. Power up the board with the switch closed;

  2. All pin are in Hi-Z (TRI-STATE)...is this true?

  3. With altera usb blaster i program the configuration device;

  4. Shut down the board and remove altera probe;

  5. Open switch;

  6. Power up the board;

  7. The FPGA reads configuration from the external memory.

is it possible to realize this kind of scheme? Are there any issues that i've not considered?

Could you suggest a similiar kind of diagram without the use of jtag programming pin?

Thanks

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Please review the Active Serial (AS) configuration scheme in Altera FPGA device handbooks for the correct connection. There are several faults in your schematic.

    E.g. figure 7–11. connection setup for programming the epcs using the as interface in CV device handbook.

    P.S.: In case that your circuit refers to passive serial configuration scheme, PS devices (Altera EPC series and compatible) can't be programmed by USB Blaster.
  • Altera_Forum's avatar
    Altera_Forum
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    could you help me in drawing a schematic with 5 Volt FPGA, reprogrammable configuration device and probe connector?

    If i use FLEX 6000 family and atmel AT17 series fpga configuration device how could dispose the connections in order to re-program the eeprom without using jtag pins?

    Is there any way?

    Thanks
  • Altera_Forum's avatar
    Altera_Forum
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    You cannot use an Atmel AT17 to configure a FLEX 6000 FPGA directly. The AT17 is a simple serial memory device that is not capable of generating the configuration clock that the FLEX 6000 requires.

    It could be made to work with an external controller, but we're now getting a little complicated.

    I suggest you use the recommended EPC1 or EPC1441 - which, I'm afraid, may well be as tricky to get hold of as the FLEX 6000 FPGA...

    Regards,

    Alex