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Altera_Forum's avatar
Altera_Forum
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17 years ago

configuration of cycloneIII

Hi,

i am new to FPGA world, so my queries are silly for u all, but it will be very helpfull if i get these doubts cleared...

i am designing a custom board which will have cycloneIII FPGA.

i have used the AP configuration for configuring the FPGA on reset using P30 flash, but some of the doubts that have are ,

  1. how will i put the configuration data into the p30 flash device ? IS it through the JTAG?

  2. how will the FPGA read the config data from the flash as it wont have an controller in it to moniter the operation? (as it is not configured)

  3. i want to know abt the NIOSII soft core. I gusess it supports basic DDR memory controller and all . So if i want to use it how do i put the NIOSII core into the FPGA ?

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    Hello - I am a relatively new user too, but after running the NEEK for a month it quickly all fell into place -

    1. JTAG yes.

    2. The C3 will configure from Flash-ROM automatically on power-up - there are several other options such as serial configurators, it's all pretty much well described on the altera website - The hard part is not getting your device configured, but protecting your design.

    3. SOPC builder integrates NIOS II and everything required such as DDR Bus controllers into one package, it is part of Quartus and is freely available from altera.com

    I'd suggest playing around with a NEEK if you can get your hands on one, it will provide you with a platform to base your design around.

    Hope this helps.