Forum Discussion
MRR
New Contributor
1 year agoConfiguration of Cyclone 10 LP with jrunner software
Hi, I'm trying to use jrunner to configure a Cyclone 10 LP FPGA through a low memory footprint microcontroller (~100 kByte RAM). Unfortunately, Cyclone 10 LP documentation states this is possibile,...
FakhrulA_altera
Regular Contributor
1 year agoAs we haven't received a response to our previous notification, this thread will be transitioned to community support. We hope all your concerns have been addressed. If you have any new questions, please feel free to open a new thread to receive support from Intel experts. Otherwise, community users will continue to assist you here. Thank you.
MRR
New Contributor
1 year agoI arranged to solve the problem writing by myself a JTAG driver. It works, the FPGA is configured and initialized, but a little problem remain: the CRC error output is set immediately after the configuration, even if the FPGA itself continues to work. At the moment the firmware is ignoring that flag, but it could be interesting to use it to determine internal bitstream corruption.
Thank you