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What else have you got connected to CONF_DONE? Is anything else holding it low? The FPGA will not start until CONF_DONE is released, whether the FPGA's internal state machine is holding it low or external circuitry.
When you say AS is reported as successful, what are you doing exactly? Programming the serial flash via JTAG? Can you program the serial FLASH device?
I suggest you focus on configuring the FPGA directly using JTAG mode until something is working.
Check all your power rails and ensure that all power pins are connected correctly. Expect strange behaviour if one power pin is not connected correctly.
Cheers,
Alex
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CONF_DONE pin has only a pullup resistor connected, only the FPGA can force it low.
I can program and verify the serial FLASH from the Programmer.
I guess the USB-blaster "can handle the device", but not the FPGA.
What more to tell?
The "Disable EPCS ID Check" option is selected (since the device isn't an EPCS-type)
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