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Altera_Forum
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17 years ago

Components and FSM in my VHDL code...

Hi, I am doing a project using VHDL for my Altera chip. In my project, I have a few components such as incoming signal detection and FSM for outputting PWM signals etc. I have to keep on ...
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Altera_Forum
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17 years ago

Kaz,

Thank you so much for your help and patience! I will try it right now.

Thanks a lot!!:-)