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Altera_Forum
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17 years ago

Components and FSM in my VHDL code...

Hi, I am doing a project using VHDL for my Altera chip. In my project, I have a few components such as incoming signal detection and FSM for outputting PWM signals etc. I have to keep on ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

If your input detection function and FSM are designed properly concurrently then it should work. Input detection doesn't wait for FSM and the FSM process doesn't wait, or does it?