complete bypass the PCS in GIGE Mode

Thanks for the answers guys

Indeed that wasn't the answer i wanted to hear, but unfortunatelly i worried that would be the only one :)

That was what i figured out, too.

Now i try to bypass as much as i can and then we'll see. The thing is, that we've got an own SGMII with our own PCS, so i just needed the pure stream. Seems to be more difficult then we thougt before.

thanks and regards

david

Page 1-7 in volume 2 of the Stratix II GX Device Handbook states:

Receiver Phase Compensation FIFO Buffer

Each receiver data path has a dedicated phase compensation FIFO buffer

that decouples phase variations between the FPGA and transceiver clock

domains. this block is always used and cannot be bypassed.

This block alone cannot be taken out. The minimum latency before you can get your hands on the received data is 4 clock cycles (depending on the protocol you are using).

Jake

I don't think it is possible.

Use the alt2gxb in basic mode for such purpose.

I am curious, isn't it the decoded RX data is much more easier to be debugged? Why would you want to see the 10B code instead of the 8B code? You still able to access the control and data character isn't it?