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MRavi1
New Contributor
New ContributorCompilation error in pipemult project.
Error (275021): Illegal wire or bus name " " of type signal Error (12153): Can't elaborate top-level user hierarchy Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 2 warn...
sstrell
Super Contributor
Super ContributorJust to explain a bit clearer, you have clock and wren connected as busses (thick lines) instead of individual wires (thin lines). Delete the busses and use the wire tool to make the connections. Also, the reset input into the register (CLRN) should be hooked up as well, either to an I/O pin or perhaps even just pulled high.
#iwork4intel
MRavi1Yes. I tried that too, I just had some problems with installation. Once I re-installed the software it worked fine. Thanks !
