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Altera_Forum
Honored Contributor
17 years agoProbably the optimal solution is used 3.0V for IO? Since no external termination is required. Also 3.3V logic can be driven without external components with 3.0V FPGA output.
Thanx, AmirProbably the optimal solution is used 3.0V for IO? Since no external termination is required. Also 3.3V logic can be driven without external components with 3.0V FPGA output.
Thanx, Amir