Combining LVDS RXs and CMOS I/Os in one bank

You can use mixed single ended and differential IOs in a bank. Pin placement rules for the device possibly require a few pads distamce between both IO standards. You can either review the device manual or "ask" the Quartus Pin Planner tool for a valid pin assignment, which is the convenient option.

Besides device IO constraints, you should provide sufficient ground connections for the single ended signals in the wiring, otherwise ground bounce might threaden signal integrity. I remember this has been a problem with some HSMC breakout boards. The HSMC specification is prepared for alternative single ended usage of the LVDS pins.