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Altera_Forum
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11 years ago

Code Optimization for FPGA

I was told the multiplier "*" in the code blow will dramatically slow down the operating speed(Fmax) of FPGA. But i don't konw why. Could somebody give me some hints on it? Any idea to optimize it? ...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Rsi = repetative strain injury

The std_ logic_vector type is meant to represent a collection of bits, while the unsigned type represents an unsigned integer. The numeric_std library defines functions for arithmatic with unsigned and signed types. There are no standard libraries for arithmatic with std_logic_vector, because it is not meant to represent anything.