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Altera_Forum
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11 years ago

Code Optimization for FPGA

I was told the multiplier "*" in the code blow will dramatically slow down the operating speed(Fmax) of FPGA. But i don't konw why. Could somebody give me some hints on it? Any idea to optimize it? ...
Altera_Forum's avatar
Altera_Forum
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11 years ago

That is just an open coded multiply, to multiply x by y (y 0..7):

(y & 1 ? x : 0) + (y & 2 ? 2 * x : 0) + (y & 4 ? 4 * x : 0)