Thanks....
I m not student. I m working as IP Design Engineer, I have 2 Year of experience in design as well as verification using verilog. Actually we are design IP Core and design verification environment in verilog to verify working of IP Core. I have design many test benches but i dont know about methods(architecture) that are used by MNC.
What is the generic method for define clock and reset in test bench(Sync & Asyn Design)?
I just want to know what is basic architecture require to verify any IP Core.
can i have your personal E-Mail ID?