Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorClock Uncertainity
Hello All, Consider a FF1-Comb-FF2 circuit, both flops clocked by same clock clk1. If clock frequency of clk1 is 16 ns, Comb delay is 0 ns, FF set up time is 0.2 ns and Clock uncertainity i...
Altera_ForumHonored Contributor
Honored ContributorHi,
The classic timing analyser uses this equation for Fmax: fmax = 1/(register to register delay - clock delay + micro tsu + micro tco) As to clock uncertainty, I believe I should add it to Tco
