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Altera_Forum
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14 years ago

Clock recovery from signle 125MHz pulses with PLL

Hi, I have a circuit that uses one PLL to recover data and clock from a single bitstream. This PLL is fed with 125 MHz clock, on it's output there is 375 MHz clock (which is used for the circuity ...
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Altera_Forum
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14 years ago

The sophisticated functionality offered with the NCO core is the resource saving way to generate high resolution sine waves. A basic digital NCO as required for a ADPLL isn't more than a simple phase accumulator, involving a few lines of HDL code. The method is explained in the NCO user manual. Also low and medium resolution sine generators can be easily implemented without referring to the Altera core if you don't have a Quartus subscription license.