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Altera_Forum
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13 years ago

Clock recovery from signle 125MHz pulses with PLL

Hi, I have a circuit that uses one PLL to recover data and clock from a single bitstream. This PLL is fed with 125 MHz clock, on it's output there is 375 MHz clock (which is used for the circuity ...
Altera_Forum's avatar
Altera_Forum
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13 years ago

The filter method I proposed apply only if there frequency component in data stream at 44.1KHz but it doesn't look that way now. If you are detecting actual pattern for sync then you got it from data already. Or do you mean your sync is not at 44.1KHz? I need more clarity please