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Altera_Forum
Honored Contributor
17 years agoclock pin assignments and cyclone III
Hello there, I have 2 external clocks and currently I have assigned them to - Pin 91 of bank 6 with 3.3 LVTTL - Pin 22 of bank 1 with 3.0 LVTTL of my EP3C5E144C8 FPGA However Quartus...
Altera_Forum
Honored Contributor
17 years agoApplication Note 447 (Interfacing Cyclone III Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems)