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Altera_Forum
Honored Contributor
17 years agoclock pin assignments and cyclone III
Hello there, I have 2 external clocks and currently I have assigned them to - Pin 91 of bank 6 with 3.3 LVTTL - Pin 22 of bank 1 with 3.0 LVTTL of my EP3C5E144C8 FPGA However Quartus...
Altera_Forum
Honored Contributor
17 years agoWhat's the error message? I/O banks are programmable, i.e. they can be configured to support different voltages, but all I/O in that bank must use the same voltage reference. Usually no-fits caused by this are because other pins in the same bank require a different voltage. The no-fit error usually expands to to show where the conflict is.
Another place to look is the Pin Planner. You can use it to list all I/O in that bank and look at their voltage. You can also run an I/O analyzer to do quick checks, rather than running a full compile and waiting for it to error out in the fitter.