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Altera_Forum's avatar
Altera_Forum
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10 years ago

Clock out from GX Transciever

I'm planning on sending two lanes of JESD204B data down a QSFP cable. By my understanding this should be quite possible as there are four CML lanes in one direction which is enough for the two data l...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Never tried it, but it might be possible if you pick the transceiver that has the CMU PLL in it (if the Stratix V transceiver architecture at all resembles the Cyclone V architecture). Otherwise you'd end up having to generate a custom high speed transceiver to output the clock, which again should be possible, but much more of a pain.