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Altera_Forum's avatar
Altera_Forum
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15 years ago

clock mux with internally generated inputs

I generated a clock mux using altclkctrl megawizard. My input signals, both the clocks and select signal are generated internally. They are not coming from the clock pin or PLL. The quartus tool comp...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Annoyingly, the altclkctrl can only be driven by a PLL for dynamic switching. If the signals are coming internally, then building a mux out of logic shouldn't really matter from a timing perspective. The only thing missing is a glitch-free switchover(which can be built with logic, it's just not as trivial as a 2:1 mux). Are you dynamically switching clocks, or choosing one and sticking with it?