Forum Discussion
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- And it passes a traditional reset synchronizer to obtain reset recovery time. --- Quote End --- Huh? I can't parse this. In your code above, you are using i_CLK_TBC as the reset in a process clocked by i_CLK_REF. You do not have any logic that synchronizes i_CLK_TBC to i_CLK_REF. If i_CLK_TBC and i_CLK_REF are similar frequencies, then there is no way you can use a synchronizer. The solution is to use something slower than the clocks and synchronize that. That 'something' can be a counter enable control. That same enable can be synchronized between the two clock domains, i.e., generated in one clock domain and synchronized into the other. You then enable two counters in the two clock domains, disable the counters, and read their counts. From the two counts, you can estimate clock frequency. Cheers, Dave