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Altera_Forum
Honored Contributor
13 years agoSynthesis works fine, too.
Maybe I must explain the code. There is just one clock, that is used as "clock", the reference clock. The clock to be observed is used for asynchronous resetting only. First, there are two synchronizing stages clocked by the reference clock to detect if the clock to be observed is stuck at 0 or stuck at 1. The counter counts if there is no action on the clock to be observed. And finally a flag is set, if the counter reaches its maximum value. So I haven't done a lot of asynchronous resetting yet, I am looking for a way to verify this, beyond simulation and just running it.