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Altera_Forum's avatar
Altera_Forum
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9 years ago

Clock Assingment

Hi! I am currently trying to assign one of the ClockControl blocks in my design. In Chip planner I have founded current Clock Control block and his full name: |Test1|ClockSource:U3|altpll:altpll_component|ClockSource_altpll:auto_generated|wire_pll1_clk[1]~clkctrl. When I copy this name in window for assignments block is not recognized? I am really struggling with this so any help is welcome. Also I have tried to move Clock control block with drag and move method but when I have positioned block in wanted position action was cancelled for some reason. Maybe CLKCTRL blocks are dedicated to PLL?

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    9 years ago

    I'm guessing you don't need the ~clkctrl block, as that's the output of the global driver. If I have trouble assigning names, I make a copy of the project with database and go to Assignments -> Back-Annotate and lock it down that way. You can also use the script here:

    http://www.alterawiki.com/wiki/back_annotation_script

    To do a more controlled back-annotation. I've often changed the location search string to *CLKCTRL* to lock down all the clkctrl globals. This method ensures you get the right name and format.