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admaris's avatar
admaris
Icon for New Contributor rankNew Contributor
1 year ago

Clarification on HBM Capacity and AXI4 Interface for Agilex 7 M Series

Dear Intel Technical Support, I have a question regarding the Agilex 7 M series FPGA, specifically related to the HBM (High Bandwidth Memory) configuration. 1、The maximum HBM capacity for the Agilex ...
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sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
1 year ago

The NoC can be used to access external memory (DDR4 or DDR5) as well as the on-package HBM2e so I would imagine the extra bits would be usable for that.