Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

CIC Megacore

hi i am tring to use the cic megacore from altera. but the core is just not running. i have made the following interface to it from my vhdl module: component CIC port( clk : IN ST...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Yes it worked :) Thanks allot!!!!!!

I ended up with this:

U2:CIC PORT map (clk=>clk,

clken=>'1',

reset_n=>'1',

in_data=>x"0F",

in_valid=>'1',

out_ready=>'1',

in_error=>"00",

out_data=>out_data,

in_ready=>in_ready,

out_valid=>out_valid,

out_error=>out_error);

BR

Benjamin