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Altera_Forum's avatar
Altera_Forum
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17 years ago

CIC Megacore

hi i am tring to use the cic megacore from altera. but the core is just not running. i have made the following interface to it from my vhdl module: component CIC port( clk : IN ST...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi,

why not just remove the processes and do this:

U1:CIC

port map(

clk => clk,

clken => '1',

reset_n => reset_n,

in_data => x"0F0F0F0F",

in_valid => '1',

...etc.

kaz