Changing the device tree blob

I'm not using Nios II so sysid is not necessary for my design.

The goal I need to achieve at the moment is to access the FPGA memory from the HPS under linux. I have looked everywhere I can think of and cannot find an example of where this happens. Does anybody know of such a design I could look at?

In pursuit of this goal, I started by using the GHRD for the arrow sockit to produce my own preloader and Uboot images. I found that the device tree provided in the arrow labs is not the same as the device tree that is generated if you use the sopcinfo file (and the board_info.xml file) from the lab, in fact they are completely different. I have attached the dts versions of both files; it seems to me that the working one has been written by hand. If you use the generated dt, the system hangs when starting the kernel.

I managed to create my own uImage that had the debug messages switched on and found that there were a variety of things wrong with the dt I had created. In short, unless I am missing something, using the sopcinfo file to generate a dt is probably a waste of time and I am better off modifying the supplied dt file. Has anybody else found the same issue?