Forum Discussion
Altera_Forum
Honored Contributor
15 years agoI am using quartus v9.1 and I found that changing "VERILOG" to
"VHDL" in the .sopc file was not sufficient. I had to find all of the references to "VERILOG" or "verilog" and change them to "VHDL" or "vhdl" in the following files: nios2.ptf nios2.ptf.8.0 nios2.ptf.bak nios2.ptf.pre_generation_ptf nios2.sopc nios2.sopcinfo sopcb_tb2_nios2.xml Only then did sopc builder actually spit out a vhdl version of the system rather than a verilog one. Imperative: Altera, add a small menu item to the sopc builder GUI that allows this to be changed at any time!