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Altera_Forum
Honored Contributor
Honored ContributorCan not simulate MAX10 with Differential IO buffers (quartus prime)
Hello, I instantiated a true differential output buffer and when I try to simulate I get the following: # Top level modules:# altera_gpio_lite# End time: 08:57:10 on Jan 31,2018, ...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- What do you want to achieve? I doubt that there is much use in simulating a differential IO buffer. Hardware features like serial termination are not modelled in functional simulation. --- Quote End --- I am not trying to simulate the differential buffer. My test bench simulates a component inside my design. Just having the differential buffer in my top-level structural design file is enough to cause this error.
