Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorCan not implement the requested PLL: VCO or PFD frequency range exceeded
Hello, I need to scale 3.58 MHz 16 times up, to 57.28 MHz. EP3C5 device. Minimum frequency I put to clear the error is 5 MHz. I created project from the scratch, does it need some default settin...
Altera_ForumHonored Contributor
Honored ContributorThank you both. Seems great in theory, but what is about implementation of it?
ATPLL does not digest 3.58. It handles frequency starting 5 MHz. Thus I do not see the way how to "create a altpll then set the multiplication to 2".
