Can not implement the requested PLL: VCO or PFD frequency range exceeded

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Hello, I need to scale 3.58 MHz 16 times up, to 57.28 MHz.

EP3C5 device. Minimum frequency I put to clear the error is 5 MHz.

I created project from the scratch, does it need some default setting to be changed? And is it possible to scale low frequencies up?

(I did not find answers in datasheet).

Thank you.

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One way to do this is to go through a digital 2x multiplication on the clock then feed the resulting signal out and back into a clock input for the PLL. Then do a 8x multiplication in the PLL.

Pete