Can i deserialize LVDS using DCFIFO ?

I don't think, that there can be a reasonable answer to the question without asking about the intended LVDS bit rate. For some reason, you are assuming rates like 1 Gbps, but why?

Technically, it't simple:

- Fastest deserialization is provided by dedicated hardware SERDES block, for those FPGA families that have it

- Second fastest option (about 400 to 800 Gbps, depending on the FPGA family) is by DDRIO double data rate registers. This method is used by Quartus software SERDES IP. It's rather easy to design similar blocks on your own, if the features of the existing MegaFunctions don't fill your needs.

- Deserialization with speeds up to FPGA core speeds can be done with regular registers

I don't see, what's the particular purpose of a DCFIFO in this regard.