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Altera_Forum
Honored Contributor
Honored ContributorCan DCFIFO rdreq and wrreq signal be valid simultaneously?
The rdclk and wrclk in my design is nearly the same frequency but not the same phase. I enabled the full and empty protect. My question is can rdreq and wrreq signal be valid simultaneously?
Altera_ForumHonored Contributor
Honored ContributorYes. But they should be valid with respect to their individual clock domain. Meaning don't assert wrreq with the read domain clock and vice-versa.
Jake
