Can Cyclone V tranceiver REFCLK used as clock resource for general IO pins?

Sorry to reply to such an old thread, but I have a similar question. We're using a Cyclone V and the only available clock input is a "Dedicated Transceiver REFCLK". I am feeding that into a PLL (altera_pll megafunction) that is used to clock FPGA fabric. We're not using any transceivers.

It compiles fine, so the tools seem ok with it. I set the IO Standard to LVDS. I found this that also seems to say it is ok:

https://www.alteraforum.com/forum/attachment.php?attachmentid=14119

But some knowledgeable people here seemed to question it. I did not do anything special with workarounds. But we're about to get a board made and it would be nice to have a clock.

Can someone confirm that this is ok.