Forum Discussion
JET60200
Contributor
5 years agoCan A10 PCIE BAR{2] access memory size be increased to 1GB (to access FPGA DDR4 1GB memory)
hello,
we are testing A10 PCIE FPGA example & PCIE Linux driver ( follow link : https://fpgacloud.intel.com/devstore/platform/18.0.0/Pro/arria-10-pcie-gen3-x8-dma/). After building FPGA example an...
SengKok_L_Intel
Regular Contributor
5 years agoHi
The PCIe IP will auto-detect the BAR size, can you go to “Base Address Registers” -> “BAR 2” -> Size (bit?)? To confirm it is either 29 bits or 30 bits. I connected 1G DDR with BAR2, and I can get 30 bits size for BAR 2.
Regards -SK