Forum Discussion
New Contributorcan 2 72-bit DDR4 interfaces be placed on 10AX027 F34 device
Hello,
For 10AX027 F34 device variant, the IO Bank 2L is supporting 3V I/O buffer type. Can check here: https://www.intel.com/content/www/us/en/docs/programmable/683461/current/gpio-banks-serdes-and-dpa-locations.html
For DDR4 interface, the IO Standard is configure to use POD12. And the POD12 IO Standard is not supported in 3V I/O Bank. Here the link for reference: https://www.intel.com/content/www/us/en/docs/programmable/683461/current/i-o-standards-support-for-fpga-i-o-in.html
That's make sense for the Quartus to show the errors about no valid locations in the region for the logic.
Regards,
Adzim
Regular ContributorHello,
For 10AX027 F34 device variant, the IO Bank 2L is supporting 3V I/O buffer type. Can check here: https://www.intel.com/content/www/us/en/docs/programmable/683461/current/gpio-banks-serdes-and-dpa-locations.html
For DDR4 interface, the IO Standard is configure to use POD12. And the POD12 IO Standard is not supported in 3V I/O Bank. Here the link for reference: https://www.intel.com/content/www/us/en/docs/programmable/683461/current/i-o-standards-support-for-fpga-i-o-in.html
That's make sense for the Quartus to show the errors about no valid locations in the region for the logic.
Regards,
Adzim
