CAM the hard way or how to compare against thousands of bits?

Since reading through 5000 memory locations can take a while, if your system needs speed you can break that up into several parallel sequencers. Using 256 entries each (for an M9K memory) you can increase your speed by about 20x and still maintain 32 bits per compare.

If you need significantly fewer than 256 cycles, you could break the compares accross several memories - a technique you should find through a search for CAMs and FPGAs - where you can use 8 memories with 4 bits each for the compare and cycle through 576 entries 36 at a time in 16 clocks in each "octet" of memory elements. This would quadruple the number of bits per compare to 128 but with a quicker hit.

This could be extended to 4 memories with 8 bits each for the compare to look at 36 entries at once. The number of bits per compare swells to 1024 bits per compare which will outgrow most devices for 5k entries.

The piecemeal compares would be implemented in the FPGA fabric with pseudo-code for the fastest results might look something like

for( 1=0; i<MAX_REGS_PARAMETER/36; ++i)

if( input_data[31:24][35:0]

& input_data[23:16][35:0]

& input_data[15:8][35:0]

& input_data[7:0][35:0] != 36'd0

) output_signals[i] <= 1'b1;

output_signal <= |output_signals;