Forum Discussion
TomCarpenter
Occasional Contributor
2 years agoBus LVDS on Arria 10 with Hardware Deserialiser
I'm trying to implement Bus-LVDS to communicate between a Cyclone IV and an Arria 10 device. For the Cyclone IV, I use the altlvds cores which are software serialisers, so no issue there. For the Ar...
- 2 years agoSERDES IP doesn't seem to be able to connect other IO-standards than plain LVDS RX respectively TX. It's apparently necessary to write your own serdes logic in these cases. No problem as such if you don't run near device speed limits, but surely annoying.
AqidAyman_Altera
Regular Contributor
2 years agoHi,
Is it possible to share the .qar file of this project? If yes, please let me know as I will initiate the email for you to send the file.
I will need to reproduce the error from my side to further check on this.
Regards,
Aqid
- FvM2 years ago
Super Contributor
SERDES IP doesn't seem to be able to connect other IO-standards than plain LVDS RX respectively TX. It's apparently necessary to write your own serdes logic in these cases. No problem as such if you don't run near device speed limits, but surely annoying.- TomCarpenter2 years ago
Occasional Contributor
Yeah, I came to that conclusion.
Ended up rolling out my own soft-SERDES core using half-rate DDIO blocks. Managed to get it to meet timing at the 720Mbps we require. Couple that with some creative dynamic phase shifting of the PLL output clocks should hopefully allow dynamic phase alignment of the receive assuming it works once I get into hardware testing.
- FvM2 years ago
Super Contributor
Thanks for confirming. I would be happier if you had found a different solution.
If I was an Intel support engineer, I'd try to find out the nature of limited SERDES connectivity. There are different possibilities:
1. Restriction of hardware connectivity in silicon.
2. Incomplete fitter implementation.
3. Intentional constraint to keep certain specifications
In the latter case there can be a "magic word" to override the constraint, to allow implementations that don't need maximum performance. BLVDS with its reduced speed could be such a case.