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Altera_Forum's avatar
Altera_Forum
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17 years ago

Building a Transfer Function using Simulink/DSPBuilder

Hello there,

I am using FLEX10KE FPGA and I am trying to programa PLL simulator using DSP Builder blocks.

I have already made a simulator using default Matlab blocks, but now I have to create the same project using DSPBuilder blocks, so I can program it on the board.

original file:

http://img357.imageshack.us/img357/1383/img1sg8.png

file i want to do:

http://img227.imageshack.us/img227/3516/img2bb3.png

How can I make this filter?!?!?! And how can I create the integrator?!?!

Thanks!!

Mutaza

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Hi Mutaza,

    I suggest you first explain your design idea of the PLL and what part of PLL is going to be digital away from simulink. I haven't used DSP_builder and wouldn't like to.

    It seems to me your thoughts are not clear about what you should be doing in the first place.

    Try and present what is given to you first and what are the requirements then and what is your plan.

    Kaz
  • Altera_Forum's avatar
    Altera_Forum
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    Hi Mutaza:

    Your z-domain transfer function can be converted to a Biquad IIR filter. Using matlab you you can convert it using a SOS command.. (Don't know the exact command on the top of my head), that will give you the biquad filter coefficients.

    You can see what the hardware of a BiQuad filter looks like at:

    http://www.earlevel.com/digital%20audio/biquads.html

    It show's all the various forms, but Direct Form 1 is usually the easiest to build for fixed point calculations.

    I haven't used DSP builder for this type of task, but if they have an IIR Biquad filter that you can program the coefficients, you should be able to type in the SOS filter coefficients and be good.

    Pete
  • Altera_Forum's avatar
    Altera_Forum
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    I don't see anything but a first order Transfer Function, so what is the biquad for?

    Moreover what is the input to the filter, the square pulses of the clock itself??

    I can see one clock source, where is the other?

    I can only understand why the XOR is there, though it is not the best way for a phase comparator.

    Kaz