Honored Contributorim building a project need to use whole ddr2 (256mb) on cyclone iii development kit...but when i config i have get a problem that i cant access to it......may be i dont know clearly about this device.....but when i config only bottom or top of DDR2 ...that it ok ???....i dont know what i have to do.....!!!!...so some body help me solve my problem....
thank in advance....
Honored ContributorThere are some address pins (afaik A14/A15) and BA signals connected to RAM chips, but these are not used in the controller. Tie those pins to ground.
Honored Contributorsorry if i ugly ....but i see in my auto map file....dont have pin a14...and a15 is used for hsmb_clk_in0...so can you tell me reason why ba signal is not used for ddr2 sdram....and i know in Cyclone III development kit ....ddr2 is divided 2 part bottom and top....
if you have use this kit....so can you give me a map file for this kit....thank so much....."*.qsf"....or "*.csv".... if you dont mind you can denote to me the way to config DDR2 on SOPC builder......thank in advance....Honored ContributorI have that Cyclone III board, but didn't use all the memory there. I also have Stratix II GX board, where the memory is organized in the same fashion.
A14 and A15 pins I've mentioned are not FPGA pins, these are DDR address bus pins A14 and A15 (last address bits). P.S. I've also used ECC there, so don't know if it is easy to set up without ECC enabled.
