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Altera_Forum
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14 years ago

Bidirectional buffer

Hi, I am working on Altera FPGA. Please help me to code a Bidirectional bus using HDL. Can anyone share a code for this. Regards, freak
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Altera_Forum
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12 years ago

Thanks Cris72 for the feedback.

However, I have already defined my io_data to be 'Z' in the testbench but the problem is the data_in is 'X' instead of Z when in tri-state condition. Any other possible root cause?