Altera_ForumHonored Contributor14 years agoBidirectional buffer Hi, I am working on Altera FPGA. Please help me to code a Bidirectional bus using HDL. Can anyone share a code for this. Regards, freak
Recent DiscussionsCyclone-V SCFIFO - adding ECC to M10K/MLAB/Auto memoryWill serialization factor of 6 in LVDS serdes IP be supported in the future on Agilex5?System PLL of Agliex5 PCIE example design cannot be locked after configurationJTAG Chain Broken on Agilex 7-I Dev KitRequest for Cyclone V Pinout File Information