Better to use a PLL or a counter (HW question)

Cris72 is right. A few other points:

A PLL output requires a global resource. This is good for timing(since it is low skew to all destinations and will be low skew in relation to other outputs of the PLL). This is also bad since it uses a global. You might be running low on them and they take up power, so if your ripple clock only feeds 10 registers or something like that, it's something of a waste.

Also, timing constraints are a little more difficult with a ripple clock. You have to put a generated clock constraint on the register, and have the -source be the node that drives it(presumably a PLL output or input port). If you have multiple ripple clock registers(i.e. a /2 register feeding another /2 register feeding another one) then each stage needs a generated clock. (If it's just a large counter and you use the MSB or something like that, then only the MSB needs the generated clock, since it is directly driven by the main clock)