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Altera_Forum
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17 years ago

Behavioural model for Altera PCI core

Hello,

Does anyone know where I could find a behavioural model for the Altera PCI core (I'm using version 2.3) which implements burst read and write transfers.

Many thanks

David

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    17 years ago

    David,

    Not sure if you already figured it out but in the Altera installation dir, in a path that would be similar to this path \MegaCore\pci_compiler-v3.2.0\testbench\verilog\pci_mt32\tb_src\ you'll find the testbenches for the PCI core. In the file "mstr_tranx.v" or "mstr_tranx.vhd", you'll find the function call for burst read/write.

    // 32 bit memory read(Address, Number of Dwords)

    // mem_rd_32(32'h10000000, 4);