Honored Contributor
Honored ContributorOK. Maybe I can help.
You must keep this in mind. This is a fully configurable embedded system on an FPGA. In the end it is only an FPGA. Every compile of the FPGA is equivalent to a different single chip Microcontroller solution from any given uC vendor.
Their tools do not have to deal with the complexity of an embedded system on an FGPA! They have all the time in the world to tweak and fix bugs for any given single uController they create - most haven't been changed in decades!
The Nios tools must be able to handle the variability since no two systems are probably going to be alike. This will cause frustration for the uController casual user. 2 weeks is typically not nearly enough time to grasp all the complexity involved. Give yourself a break. Take a deep breath and open your mind to learning some real cool stuff. You are not going to benefit by comparing an arcane system like an 8051 to a dynamic environment in which soft processors in a configuratble hunk of silicon this gives you.
Add a file called main_program.c with the following code : void main(void) {}
Click build. The builder crashes with some cryptic error. Now what ?
Post the error message and I can try to help you there. BTW, it may be just as simple as adding a ; to the program (in between the { } like this: {;}. Most compilers really don't like an empty main() function anyways and it's not real world anyways. You may have better luck just putting in a while loop wiht a simple statement in the body. This is a typical ANSI-C type problem.
Other questions i have that go unanswered :
- How do i assign a variable to a specific address. ( like the _at_ directive in Keil's C51 )
Totally unnecessary in the Nios environment. The 8051 requires this since you typically have only 256 bytes of RAM and that is the way to access SFR's. This fine grain access (with the use of NON-ANSI standard constructs like '_at_') is necessary for severly limited resource processors like the 8051.
- How do i write an interrupt handler ? ( in the 8051 world this is easy just write 'interrupt x) after your function header and you are done. the linkers know what to do)
Again, the 8051 is a severly limited processor. The Keil construct is NON-ANSI standard because of this. With the Nios the HAL contains the interrupt vector handler. You do not need to write one. All Altera and most vendor IP peripherals have their own drivers as well. But in the cases where you need to write your own handler (for your custom peripheral) then the HAL API provides for this. You can review the API here. Pay attention to the collection of functions around alt_irq_register() on page 12-34.
- What is the layout in memory of a progam ? ...
I want a step by step example. ...
The need you require depends on an understanding of the system you are creating. In terms of compiling and debugging you don't need to do anything. The debugger in the IDE knows how to read your elf file (elf is the binary format output for the Nios) and write it to the correct memory for debugging. The Nios flash programmer knows how to program tye CFI flash in your system if you decide to use one (highly recommended). All in all you should never have to mess with the elf file or the .flash file other than compiling, debugging and programming the flash.
You can use many of the command line tools to do what you want in the case you need something special. FOr the most part there is nothing you can't do.
If you get errors with cygwin then your quartus/nios installation is hosed. Uninstall everything and re-install in this order: Quartus, Megafunctions IP, Nios, Modelsim (if you want to do HDL simulations).
Note for a step by step example see the tutorial link at the end of my post.
I want to know what the layout of the file is. ...
Nios is little endian. You would store 0xDDCCBBAA into the first word.
...All i need is a simple skeleton. I can take it from there. ...
Since you are a beginner I highly recommend you walk before running. Focus on learning the tools and then use the tools to get what you want. I'm not saying you can't do what you are asking. It can be done. But you will go through a process of "why, why,why" everytime you see somthing you are not familiar with.
It may seem that what you are trying to do is simpler but in fact it isn't. You are trying to use the tools in a non-standard way (remember soft processor in a programmable FPGA - no where near as simple as working with a 40 year old architecture like an 8051) which makes the development process much more complicated.
BTW, You absolutely do need the JTAG debugger. Trust me on this. Turn it on and leave it on until you are an expert enough with the tools and systems and know the consequences of turning it off. You will need to use the debugger and you cannot debug without the JTAG debugger.
...After posting on various forums someone explained that i can use a define construction like :
#define a (*(volatile unsigned int *) (0x00100000))
#define b (*(volatile unsigned int *) (0x00100004))
This is correct. This is the proper ANSI accepted way of accessing specific memory locations. No need for a NON-ANSI construct like "_at_" with a full ANSI compliant compiler (note the Keil compiler uses a non standard implementation of pointers which is one of the reasons it uses many NON-ANSI constructs. Being an expert in Keil C for the 8051 does not make one an expert in ANSI C).
Will the linker know it needs to stay away form those locations ? ...
The linker will only link to the RAM you define in the <project>_syslib properties in the IDE.
Again, you do not need to place variables at specific locations with the Nios.
i have a bunch of variables that need to reside at very specific locations in SRAM because they get written through an avalon master port that can stop the NIOS, change the contents of those locations and let the NIOS resume. ...
In this case you need 2 seperate RAM's. One for the Nios code, heap and stack and the other for your custom implementation. Define the Nios RAM for use with the linker in the <project>_syslib properties dialog box. Note that onchip memory is available to you if you only have a single off chip SRAM/SDRAM/etc.
... How can i see the compiled output as machine language ( ASM opcodes ) ...
Use the output of objectdump. You can turn it on by going to the Windows menu bar in the ide and selecting the "preferences" menu option. In the dialog box that comes up, click on Nios on the left hand side. On the right side there will be a checkbox for "objdumP" turn it on. The objdump file will reside in the same place as your elf file (typically here: <project>/Debug/<project>.elf.objdump).
This text file has a full link map, symbol map and the 'C' code interspersed with the assembler output.
...desperate ...
I know some of my answers may frustrate you. I apologize up front for that but I want to make sure you understand why you will get a lot more out of the tools by understanding how they work first and then how to do what you want to do.
Based on your questions it would seem the 8051 might be all you have worked with. Nios on an FPGA is a different universe than that. You have only scratched the surface of the differences. Understanding the tools better will help you determine if the approach to your designeven makes sense.
Here are some resources to help you better:
Nios II Development Kits. If you don't have one get one. You can't do any tutorials without it and all of the quartus design examples will work with these kits out of the box. This is absolutely necessary to develop a comfort level with the tools. ALso having a kit will allow you the freedom to explore without troubleshooting a PCB on top of an FPGA and SW all at once.
Nios processor reference manual - Read it cover to cover.
Software Developers handbook - Read it cover to cover.
Nios II HW tutorial - You must do this tutorial.
Nios II Processor Online Demonstrations - You must view as many of these as you can
With some patience you can discover how the Nios II on an FPGA is soooo much more than a simple 8051. There is no free lunch. Once you get a good grasp you will see how the flexibility of this design methodolgy can help you in ways you never before thought possible.
Good Luck!
Rick
