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Altera_Forum
Honored Contributor
16 years agoBeginner questions on HDL component mapping
Hello, I have a couple of confusing points about component port mapping, which I would really appreciate some explanation on. 1) Do the inputs map to inputs only? Can an output of a comp...
Altera_Forum
Honored Contributor
16 years agoThere is no problem. In VHDL you instantiate entities. You can instantiate each entity as many times as you want and drive them from different signals. They are completly independent.
So in your case, its exactly like you said - 2 separate clocks drive 2 separate LEDS. there is only 1 source file for LED_FLASHER. You dont need 2 source files.