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Altera_Forum
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16 years ago

Beginner questions on HDL component mapping

Hello, I have a couple of confusing points about component port mapping, which I would really appreciate some explanation on. 1) Do the inputs map to inputs only? Can an output of a comp...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Thank you FvM.

Sorry I have made a mistake. The code considers a signal, CLK, being mapped to outputs of two components. I am confused as to what happens in this cae and why would you use such multiple mapping.

Thank you.