Backbone,timing,BLVDS and max speed

"Will be able the core works on frequency 350 MHz?"

Regarding the above question, you could refer to the core performance specs in the CIV device datasheet -> Table 1–24. Clock Tree Performance for Cyclone IV Devices, look for your specific part to check if the clock tree can meet your target 350MHz. If can, the next you would need to do is to perform timing analysis with your design to see if there is any timing violation. Note that the specs state the max limit but the core operating max frequency will be limiting by your design as well. Since you are using PLL in your design, you might want to check also Table 1–25. PLL Specifications for Cyclone IV Devices to check the PLL frequency. Hope these help.