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Altera_Forum
Honored Contributor
15 years agoAvalon OpenCores Ethernet MAC and QII version 10 and higher
Hi, I'm migrating my design to QII 10.1sp1 (after an unsuccessful try with v11.0) and can observe a warning with SOPC builder about the parameter SYS_CLOCK_RATE:CLOCK_DOMAIN that must be of typ...
Altera_Forum
Honored Contributor
14 years agoHi,
I'm also having problems running the Avalon OpenCores Ethernet MAC; one thing I stumbled over is in the "SOPC Builder to QSys Migration Guidelines AN 632", in the chapter "Avalon-MM wait-request Signal". It seems that the notion of the wait-request signal on the Avalon bus has changed. Is this possibly a problem for the current version of the OpenCores Mac? I've never seen rdreq signal on the rx_dma fifo going up, and it seems to me, that in eth_avalon_rxdma.v it's assumed that the waitrequest is going down ... Any ideas?