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Altera_Forum
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14 years ago

Avalon OpenCores Ethernet MAC and QII version 10 and higher

Hi, I'm migrating my design to QII 10.1sp1 (after an unsuccessful try with v11.0) and can observe a warning with SOPC builder about the parameter SYS_CLOCK_RATE:CLOCK_DOMAIN that must be of typ...
Altera_Forum's avatar
Altera_Forum
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14 years ago

Yes it is correctly initialized. I'm using the same kernel, that is flashed.

What I power the board on, Linux boots and everything works fine.

Once the FPGA is reprogrammed with the QII v10 design, the kernel reboots and, there, the eth0 is working anymore.